The present invention relates to a method of fabricating integrated circuits, and more specifically to fabricating monocrystalline wafers supporting dielectrically isolated single crystal islands, which can be used as starting substrates for making integrated circuits or isolated discrete devices on a single substrate.
An integrated circuit (IC) or an array of discrete devices includes numerous semiconductor devices. Current leakages and parasitic capacitances between devices can interfere with the intended operation of the circuit, so in many circuits it is necessary to electrically isolate devices from one another. Several isolation techniques have been used. In junction isolation, each device is isolated by a surrounding layer of material, of the conductivity type opposite to that of the device periphery. This creates a PN junction which can be reverse-biased to block stray currents. However, junction isolation has several drawbacks. Each junction has a slight capacitance which degrades the high frequency response of the circuit. A small, thermally generated current across the reverse-biased junction is facilitated by the large collector-like area outside the junction. PN junctions subjected to ionizing radiation generate photocurrents which are objectionable and may even destroy the junctions. Some applications require voltage differences that would cause unwanted current flow or breakdown in the junction(s) between neighboring devices, prohibiting the use of junction isolation. Finally, junction difuusions have significant lateral dimensions, which geometrically limit circuit density. Because IC cost is proportional to circuit size, circuit elements should be as small as possible, especially in large scale integration (LSI) circuits.
For improved frequency response, radiation immunity, and electrical isolation, IC devices are often separated by highly resistive or "dielectric" regions, rather than by PN junctions. Several prior art dielectric isolation techniques provide a single crystal silicon island over a thin layer of dielectric material, such as silicon dioxide, which insulates the single crystal from the underlying support wafer.
A monocrystalline silicon wafer can be ion implanted, as in U.S. Pat. No. 3,855,009, to form an insulating layer of silicon oxide, silicon carbide, or silicon nitride, buried about 0.4 microns beneath the wafer surface. Damage to the surface caused by ion bombardment can be largely repaired by annealing, leaving a surface of reasonably high quality monocrystalline silicon, on which epitaxial silicon can be grown. This technique forms only thin isolating layers and processes bulk silicon at high cost, since it requires an expensive, high-energy, ion implanting machine. A subsequent epitaxial deposition is needed to form the silicon region for most types of circuits.
A common process for forming dielectrically isolated single crystal islands starts with a monocrystalline silicon wafer. Single crystal regions for the islands may be constituted by subsurface regions of the wafer, which are laterally separated either initially (by V-grooves, as in U.S. Pat. No. 4,468,414) or after other steps (by etching, as in U.S. Pat. No. 4,056,414). Or, the islands may be formed by growing epitaxial silicon from the exposed wafer surface through seed windows in a patterned dielectric layer (U.S. Pat. Nos. 3,850,707 and 3,756,877). Wherever the islands are formed, their tops are covered with a dielectric (oxide) layer, and a thick polycrystalline support layer is grown over the entire wafer. Next, the wafer is turned upside down and the original substrate is removed, typically by lapping and/or grinding and polishing, to the level of the final single-crystal island surface. For subwafer surface islands, this level is at the depth of the islands beneath the wafer surface; for on-surface islands, this level is at the original wafer surface. If the island regions are not already laterally separated, this is done.
A polycrystalline support layer has the disadvantage of not being as strong as monocrystalline silicon. Also, polycrystalline and monocrystalline silicon have different thermal coefficients of expansion, causing a slight warp between the islands and interfering with lapping the wafer to a final, precise island thickness.
These problems would be avoided if the support wafer were monocrystalline, but deposited silicon grows in polycrystalline form on an SiO.sub.2 insulating layer. One way of obtaining a monocrystalline support is to grow monocrystalline silicon heteroepitaxially onto a crystalline insulating substrate, such as sapphire (aluminum oxide) or spinel (aluminum magnesium oxide). However, these insulators have crystal structures that do not quite match that of silicon, and growing silicon crystal on a mismatched lattice produces interface stresses and stacking faults. These crystal defects prevent the epitaxial disposition of silicon islands of satisfactory uniformity for use as starting substrates in which to form high quality, active devices such as bipolar transistors and DMOS transistors. Finally, aluminum oxides and monocrystalline silicon have different temperature coefficients of expansion, which create further interface stresses at temperature extremes.
Polycrystalline supports can also be replaced by bonding a monocrystalline support layer above the insulation, as in U.S. Pat. Nos. 4,411,060 (metallic bonding), and 3,909,322 (glass fusion). However, bonding requires a "glue" layer, which is fused by heat and pressure. Such bondings may fail at high temperatures. Alternatively, if epitaxially grown islands can be isolated from their seeding areas, then the original monocrystalline wafer support can be saved. This avoids the steps of growing polycrystalline silicon and removing monocrystalline silicon, and the mechanical deficiencies of polycrystalline supports. In U.S. Pat. No. 4,461,670, an insulating pattern is deposited on a monocrystalline wafer, then island silicon is deposited, in polycrystalline form over insulation and in epitaxial monocrystalline form over seeding windows. The polycrystalline silicon is melted and, under a carefully controlled temperature gradient, recrystallized from the seeding windows up through holes in, and across, the insulation. The seeding windows are removed and replaced with insulation to complete the isolation of the islands. However, such melting has the drawback of needing a "capping" layer over the island material to prevent it from bunching up or "balling" and becoming uneven. Nucleation of single crystal silicon in this fashion has only been used for low voltage MOS transistors.
There remains a need, therefore, for a method of producing dielectrically isolated, single crystal islands in monocrystalline wafers, that can subsequently be used for manufacturing a variety of devices.